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Displaying 1 - 2 of 2

FPGA-based coprocessor for real-time SENSE reconstruction: Design and Implementation

Session Type:Digital Poster

Session Time:09:15

Program Number:1588

Presentation Time:09:15

Room Number:Exhibition Hall

Computer Number:Computer 155

High performance GPU enabled GRAPPA reconstruction using CUDA

Session Type:Digital Poster

Session Time:08:15

Program Number:2436

Presentation Time:08:15

Room Number:Exhibition Hall

Computer Number:Computer 138

Displaying 1 - 2 of 2