Muhammad Faisal Siddiqui1, Abubakr Shafique2, Yousif Rauf Javed2, Talha Ahmad Khan2, Hamza Naeem Mughal2, Ahmed Wasif Reza1, Hammad Omer2, and Jeevan Kanesan1
1Electrical Engineering, University of Malaya, Kuala Lumpur, Malaysia, 2Electrical Engineering, COMSATS Institute of Information Technology, Islamabad, Pakistan
Synopsis
FPGA (Field Programmable Gate Array)
based application
specific hardware, for real-time Sensitivity Encoding (SENSE) reconstruction, embedded
on the receiver coil system may provide reconstruction without transferring the
data to the MRI server. This may dramatically decrease the transmission cost of
the system and the image reconstruction time. This paper proposes an FPGA
implementation of SENSE algorithm using two different sensitivity maps
estimation methods (pre-scan and E-maps). The results show that the
proposed system consumes only 145.64 μs for SENSE reconstruction (acceleration factor=2), while maintaining the quality of the reconstructed images with good
mean SNR (29+ dB) and significantly less artefact
power (<9×10-4) values.Purpose
To provide a real-time SENSE
(Sensitivity Encoding) reconstruction on FPGA (Field Programmable Gate Array) with
the coil sensitivity maps estimated using (1) pre-scan method (2) Eigen-value approach
Methods
In
parallel magnetic
resonance imaging (MRI) scan time is reduced by
acquiring fewer lines in k-space,
which reduces the field-of-view (FOV) producing aliased (under-sampled) images.
SENSE1, is a widely used algorithm in clinical MRI scanners
to reconstruct the unfolded image from under-sampled data. The importance of speed in parallel MRI
real-time reconstruction generates the requirement to develop application
specific hardware for SENSE reconstruction. This paper presents an FPGA implementation for
SENSE reconstruction right on the
receiver coil system without the need to transfer data to the server
(workstation). In this paper, SENSE reconstruction is performed using two
different coil estimation methods (pre-scan1 and Eigen value decomposition method2). In the proposed architecture, 16-bit
fixed point arithmetic binary notation is used to represent the real and imaginary
parts of the complex MRI data. All the hardware modules such as complex
multiplier, complex matrix multiplier, pseudo inverse and square root are designed according to the algorithmic
needs to increase the throughput of the architecture.
The
proposed architecture is tested on human head and phantom datasets acquired
using GE MR450, 1.5T MRI scanner at St Mary’s Hospital London using Fast
Spin Echo sequence with the following scan parameters: Slice thickness $$$3mm$$$, Matrix size $$$256×256$$$, Flip Angle $$$90°$$$, TR $$$520ms$$$, TE $$$15ms$$$ and FOV $$$55mm$$$. The
proposed architecture uses coil sensitivity profiles obtained from the pre-scan
method1 and Eigen value decomposition method2 (E-maps)
for SENSE reconstruction. E-maps method is a better choice in situations
where motion artefacts are likely to affect the data because it does not
require a pre-scan and uses auto-calibration lines in k-space for sensitivity profile estimation2. However, pre-scan method is computationally less complex
to implement but requires additional low resolution images before the actual scan
and is also sensitive to motion artefacts.
The coil sensitivity matrices and folded images are
stored in the memory of the FPGA (Virtex-6) and the proposed SENSE architecture
is used to reconstruct the un-folded image. Finally, the output is transferred
from FPGA to MATLAB, using serial communication, for validation of the proposed
system. Artefact power3 (AP) and SNR maps4 are used to
quantify the quality of the reconstructed images.
Results
Eight channel receiver coil datasets (phantom and human head) with an
acceleration factor of 2 are used for the validation of the proposed system. The
dimensions of the aliased images and sensitivity maps used in this paper are $$$128×256×8$$$ and $$$256×256×8$$$, respectively. A
comparison between the reconstructed images computed using coil sensitivity
maps obtained from both the methods are illustrated in Figure 1. Figure 2 shows
the SNR maps of the reconstructed images. Table 1 provides a comparison of mean
SNR and AP of the reconstructed images using pre-scan and E-maps sensitivity
maps. The results confirm that the proposed design produces high quality reconstructed images from the under-sampled data.
Discussion
The results show that the proposed architecture
produces artefact-free images. One advantage of the Eigen-value method to
estimate sensitivity maps is that it does not require a pre-scan which makes it
suitable for the cases where motion artefacts are considerable. However, the
pre-scan method has slightly better quality than the images reconstructed with
E-maps in terms of AP and mean SNR. Smaller values of AP $$$(<9×10^{-4})$$$ and
good mean SNR $$$(>29dB)$$$ ensure the quality of the reconstructed images
produced by the proposed system.
The proposed system is capable for run-time SENSE reconstruction
using both sensitivity maps estimation method and consumes merely $$$145.64 μs$$$ to produce reconstructed image $$$(256×256)$$$. Furthermore, the proposed system can be embedded on the
receiver coil system leaving no need to transfer all
the raw data to the memory banks of the MRI workstation, thereby, reducing the
coaxial noise. The on-chip reconstruction not only provides efficient memory
usage by only sending the reconstructed image but also reduces the data transmission
cost.
Conclusion
The proposed FPGA based SENSE architecture has
the potential to compute accurate images from under-sampled data using the
receiver coil sensitivities (pre-scan sensitivity and E-maps sensitivity). Efficient memory usage and less transmission
cost with remarkable mean SNR and AP are the significant
features of the proposed work. The proposed architecture may be useful for
the modern MRI systems.
Acknowledgements
This research work is supported by the
University of Malaya Research Grant (UMRG) scheme (RG286-14AFR). MFS is
supported by the Bright Sparks scholarship of University of Malaya.References
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